Let’s talk test points (TPs), be they friend or foe. Plenty of PCB engineers have nightmares about retrofitting these into their perfect designs after a final review. So, how many test points are enough, and why should we care?
The problem is that test points live in an alternative reality to the regular spacing constraints of a PCB design. There is a monumental contrast between the requirements of test-point-to-test-point spacing when compared to SMD component-to-component spacing.
Basic ICT fixture suppliers will request a test-point-centre-to-test-point-centre spacing (TP to TP) of a whopping 2.54mm. With some shopping around, you may get this down to 1.7mm.
In contrast, component assembly requirements commonly permit components to be spaced just 0.4mm apart without many complaints. As for PCB fabricators, even the most basic PCB supplier is comfortable with 0.15mm line width and spacing these days. So, now you start to see the problem. How can we achieve 100% test coverage of a board if we cannot place multiple TPs close enough to the features we are trying to check?
Should every net have a test point? Well, yes according to the Germans… In my previous role as a designer, 100% testability of all nets was the stated strategy.
However, you need to understand that ICT is not intended to be the final test of a product. ICT plays a critical role to stop production if something has gone wrong with the setup of the line. This is to catch errors on the assembly line before thousands of PCBs are built with the potential for an incorrect resistor, or assembly program, or even a wrong PCB or component orientation. Catching these potential mistakes is of huge importance and can save large rework hours or material scrappage costs.
Therefore, we need a strategy to reduce the quantity of test points on a design while still achieving the desired objective.
Some points to consider:
Consider if there are 10 x resistors of the same value on the PCB; is it critical to have 2 x ICT pins for every individual resistor on the board? If the wrong part is being placed by a placement machine, then it will be wrong for all.
In the example of ICT check for component value, if a capacitor is in parallel with a much larger value, does it make sense to put extra test points down for this? Smaller values can be shadowed, especially for components that have small enough values to be hidden entirely within the allowed tolerance of the larger component value.
Two resistors in series can be considered a chance to eliminate one test point by measuring across both resistors in series. This works if the values do not shadow each other as described above.
Do you really need to check all diodes/LEDs for orientation? If the program places one part correctly, the others shall also be correct if they have the same part number.
Usually, there is a series resistor placed in the LED circuit. It might be more prudent to place just two probes to test this as a series circuit, eliminating the need for one test point at the base of the diode.
Similar thinking can be applied to transistors.
What about direct chip-to-chip communication lines such as SPI? If there is no series resistor in between, do we even need a test point on every one of these internal connections? What test can be performed? Perhaps none. Talk to your ICT engineer; there may be some IC pins that we can safely probe to perform a tristate buffer check, for example. But do expect that for many IC pins, a test point may not make sense at all. Have the conversation with your test engineer if you really need to save space on your board.
Resonators are not generally tested by ICT; so, we don’t bother putting probes there. In the past, a project in which I was involved had a faulty resonator tolerance. This could not be tested for at ICT. It was intelligently agreed that timing should be checked by some internal communication lines between chips. The frequency timing of these lines was directly proportional to the frequency of the resonator. (So do put some probes there, top tip!)
Does your assembler use Automatic Optical Inspection (AOI)? This machine will visually check soldering quality of component joints, but it will inherently also check for component presence. So, why check 100% for presence using ICT also?
As for PCB shorts, it should be a standard for you to demand 100% electrical test from your PCB fabricator for every single board you receive. This is the fabricators' equivalent to ICT of the bare board. They have very fast machines to electrically test all adjacent lines for shorts or resistance, and to check for opens. This should be a standard quality check on all PCBs.
High-end design projects may be able to afford the cost of a special test-pin jig for certain chip types which can be integrated into the ICT fixture. These offer a custom high-density probe arrangement that surrounds a specific IC type and contacts directly onto their SMD pads. This will save a lot of space and remove a huge quantity of TPs from the surrounding design, but adds to the fixture cost, durability, and lifespan.
Is it necessary to test using just one fixture? Why not use two fixtures or more? ICT pins cannot be placed closely together for mechanical reasons, but the copper pads on the PCB can. Therefore, we can test using fixture A to cover, say, 50% of the components on the board, and then test using fixture B to cover the other 50%. This way, the ICT fixture rules and the PCB spacing rules can both be minimised while 100% of components are potentially checked on each PCB.
If there are any experienced designers out there that want to offer some insight, experience, or feedback in this area, be our guest and share your story. All comments are welcome!