CUSTOM RULE IN ALLEGRO CM TO SUM WIDTH OF MULTILPLE SEGMENTS OF THE SAME NET
Hi all,Consider the figure below.The yellow Cline is carrying a certain amount of current. Due to spacing constraints, its width must be reduced. However, multiple, thinner, Clines must be used to make...
View ArticleOrCad X standard vs OrCad X Professional
Does anyone know what the differences are in available software features and capabilities between OrCad X Standard and OrCad X Professional licenses?
View ArticleMechanisms for linking a circle to the cursor while in an active command!
Greetings,I'm currently attempting to affix a circle to the cursor during an "add connect" command. However, I encounter an issue where the cline itself disappears, leaving only the small circle. Upon...
View Articledefine via structure path
Hi help me,I want to import via strcutre to new design,the via structure is created in old design.but i dont know to define the via structure lib or path.the via structure file is .exml, i dont find it...
View ArticleCopper void under a trace across layers
Hi,Is there a way to specify that copper should be removed below a trace through all the layers under the trace similar to the way DYN_CLEARANCE_OVERSIZE removes copper next to the trace. In other...
View ArticlePCB Design Rule Checks Demystified
Design Rule Check (DRC) in a PCB design is a process used to ensure that the design meets certain rules and guidelines for performance and manufacturability. DRC is typically done using specialized...
View Articleskill to via align and set the sapce or dist between vias in allegro
Hi all,The allegro have one via align fuction in the route>resize/respace>align vias or command is via align.it is a simple via align fuction. I want to align via and set the vias space or Dist,...
View ArticleIs Via varry radial type only support integer angle?
Hi I use via varry to place varry via, but the radial dont support 0.5 °.as show the pic, i set the angle is 22.5°,but the via isnot equal angle. it only support Integer angle, if i set 22.9°,the...
View Articleshape parameter
hello: is there a way to access the shape parameters in an easier way? after selecting a shape, it does not show the parameters on the right botton menu. so i usually select a shape from the menu and...
View ArticleExporting Libraries
Hi,When I Export libraries using "dlib" it takes a lot of time for some Board files and in the end it won't even generate after waiting for like 8hours. Is there any way to speed up the process?Using...
View ArticleThermal pad
Hi, We using 17.4. Our application Temprature sensor based. How to create thermal Via? Please help on this error : BEGIN LAYER: Anti pad size is equal to or smaller than the regular pad size. This...
View ArticleProblem creating an inline form
Hello,2 years ago I created an inline form that worked pretty well. You can find it here : githubI am trying to create another skill program using an inline form base on the code from the example...
View ArticleDFA circle will not appear while placing components in allegro PCB Artist ?
Hi Team,I am using Allegro PCB artist 23.1 version. I did DFA in constraint manager but i could not find the spreadsheet table for enable the DRC ON or DRC Mode to 'Off'. is that feature is available...
View ArticleBend Option id 3D Canvas is greyed out after creating my 2nd Bend in v22.1
I have a simple flex circuit with stiffeners on each end. The final path for the flex in the end application goes through a lot of bending (8 bends in total). I can easily define my 3D anchor point and...
View Articleallegro PCB designer crazy panning
From time to time I need to review or make some minor board changes with Allegro (I'm a chip designer so live in Virtuoso land). Panning is just driving me nuts. There are two main issues and I'm...
View ArticleCadence OrCad PCB 17.2 error code: "(SPMHDB-278): Module does not fit in...
I have a place replicate module of a circuit that works on one design bringing up a unknown error message when I apply it to a new design. The modules was created in OrCad PCB 17.2 and error is showing...
View Article3D View: Via shows it is covered with Dynamic Copper
Hi,I have a Via that connects to a dynamic copper shape. The 3D View shows that the via will be covered in copper. Does anyone know how to resolve this? Below is an image of what happens when the...
View Articleskill for check symbols outline overlapping
Hi all,I want to auto check all symbols placement on the board.Each of the symbol's outline can't overlapping.How can I use skill to achieve results? Thanks~
View ArticleWhat is spaced/staggered multi drill on a single pad
Hai Community,What is spaced/staggered multi drill on a single pad.
View ArticleHow to get the list of unconnected pin pairs in the DRC status
Hai community,How to get the list of unconnected pin pairs in the DRC status, i can get the list in the quick reports >> unconnected pin pairs or in the DRC status window if we click on the...
View Article